Difference between revisions of "NVGate DSP computation SPU"

NVGate DSP computation SPU (view source)

31 bytes added , 15:26, 15 February 2022

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Revision as of 15:21, 15 February 2022 (view source) Lmagimel (talk \| contribs) (→‎FFT) ← Older edit		Revision as of 15:26, 15 February 2022 (view source) Lmagimel (talk \| contribs) (→‎FFT) Newer edit →
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	===FFT===		===FFT===
	On force DSP the SPU computation per channels is not linear. So we have the following table for real time SPU computation :		According to the architecture of force DSP, the SPU computation per channels is not linear. So we have the following table for real time SPU computation :