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Difference between revisions of "NVGate DSP computation SPU"
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NVGate DSP computation SPU (view source)
Revision as of 14:18, 14 February 2022
, 14:18, 14 February 2022no edit summary
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[[Image:fft_sampling.png|500px|none]] | [[Image:fft_sampling.png|500px|none]] | ||
==SOA== | |||
===Computation SPUs:<br>=== | |||
{|class="wikitable" style="background:white" border="2" cellspacing="0" cellpadding="4" width="79%" align="center" | |||
|align = "center"|'''Bandwidth (Hz)''' | |||
|align = "center"|'''Decimation factor''' | |||
|align = "center"|'''Resolution''' | |||
|align = "center"|'''SPU/Channel''' | |||
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|}<br clear="all"> | |||
[[Image:Order_analysis_19.png|framed|none]] | |||
Sampling Frequency: set in ''Front-End/Inputs settings/Input sampling'' | |||
FFT Bandwidth: set in ''FFTx/FFT analysis/range'' | |||